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» Characterizing non-deterministic circuit size
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ISQED
2010
IEEE
227views Hardware» more  ISQED 2010»
14 years 19 days ago
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks
Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip po...
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, ...
CHES
2003
Springer
104views Cryptology» more  CHES 2003»
13 years 11 months ago
Power-Analysis Attacks on an FPGA - First Experimental Results
Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular, especially for rapid prototyping. For implementations of cryptographic algorithms, not only the speed and ...
Siddika Berna Örs, Elisabeth Oswald, Bart Pre...
CORR
2008
Springer
106views Education» more  CORR 2008»
13 years 5 months ago
Infinity-Norm Sphere-Decoding
Abstract--Promising approaches for efficient detection in multiple-input multiple-output (MIMO) wireless systems are based on sphere-decoding (SD). The conventional (and optimum) n...
Dominik Seethaler, Helmut Bölcskei
FTEDA
2006
137views more  FTEDA 2006»
13 years 5 months ago
Statistical Performance Modeling and Optimization
As IC technologies scale to finer feature sizes, it becomes increasingly difficult to control the relative process variations. The increasing fluctuations in manufacturing process...
Xin Li, Jiayong Le, Lawrence T. Pileggi
ECCC
2010
124views more  ECCC 2010»
13 years 5 months ago
Lower Bounds and Hardness Amplification for Learning Shallow Monotone Formulas
Much work has been done on learning various classes of "simple" monotone functions under the uniform distribution. In this paper we give the first unconditional lower bo...
Vitaly Feldman, Homin K. Lee, Rocco A. Servedio