2 search results - page 1 / 1 » Checker Design for On-line Testing of Xilinx FPGA Communicat... |
DFT
2007
IEEE
13 years 11 months ago
2007
IEEE
In the paper, a methodology of developing checkers for communication protocol testing is presented. It was used to develop checker to test IP cores communication protocol implemen...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, the methodology for automated design of checker for communication protocol testing is presented. Based on the level of checking, different design strategies can be ...