Sciweavers

Share
DFT   2007 IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Wall of Fame | Most Viewed DFT-2007 Paper
DFT
2007
IEEE
152views VLSI» more  DFT 2007»
10 years 6 months ago
TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...
Cristiana Bolchini, Antonio Miele, Marco D. Santam...
Disclaimer and Copyright Notice
Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.
IdReadViewsTitleStatus
1Download preprint from source152
2Download preprint from source142
3Download preprint from source141
4Download preprint from source135
5Download preprint from source123
6Download preprint from source112
7Download preprint from source109
8Download preprint from source105
9Download preprint from source104
10Download preprint from source103
11Download preprint from source103
12Download preprint from source101
13Download preprint from source100
14Download preprint from source95
15Download preprint from source86
16Download preprint from source86
books