18 search results - page 1 / 4 » Chip level thermal profile estimation using on-chip temperat... |
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
—This paper addresses the problem of chip level thermal profile estimation using runtime temperature sensor readings. We address the challenges of a) availability of only a few t...
GLVLSI
2008
IEEE
13 years 5 months ago
2008
IEEE
The main contribution of this work is an analytical model for finding the upper bound on the temperature difference among various locations on the die. The proposed model can be u...
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
GLVLSI
2010
IEEE
13 years 10 months ago
2010
IEEE
Next generation industrial embedded platforms require the development of complex power and thermal management solutions. Indeed, an increasingly fine and intrusive thermal contro...
TCAD
2008
13 years 4 months ago
2008
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...