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IPPS
1998
IEEE
13 years 9 months ago
Virtual FPGAs: Some Steps Behind the Physical Barriers
Recent advances in FPGA technologies allow to configure the RAM-based FPGA devices in a reduced time as an effective support for real-time applications. The physical dimensions of ...
William Fornaciari, Vincenzo Piuri
ICCD
2006
IEEE
116views Hardware» more  ICCD 2006»
14 years 2 months ago
RTL Scan Design for Skewed-Load At-speed Test under Power Constraints
This paper discusses an automated method to build scan chains at the register-transfer level (RTL) for powerconstrained at-speed testing. By analyzing a circuit at the RTL, where ...
Ho Fai Ko, Nicola Nicolici
JUCS
2000
135views more  JUCS 2000»
13 years 4 months ago
The Price of Routing in FPGAs
: Studying the architectural evolution of mainstream field programmable gate arrays (FPGAs) leads to the following remark: in these circuits, the proportion of silicon devoted to r...
Florent de Dinechin
FPL
1999
Springer
147views Hardware» more  FPL 1999»
13 years 9 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
13 years 11 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...