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» Circuit simulation based obstacle-aware Steiner routing
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FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
13 years 9 months ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
13 years 11 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
DATE
2006
IEEE
103views Hardware» more  DATE 2006»
13 years 11 months ago
Novel designs for thermally robust coplanar crossing in QCA
In this paper, different circuit arrangements of Quantumdot Cellular Automata (QCA) are proposed for the so-called coplanar crossing. These arrangements exploit the majority votin...
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, ...
ICCCN
2008
IEEE
13 years 11 months ago
TRACK: A Novel Connected Dominating Set based Sink Mobility Model for WSNs
—The core functionality of a wireless sensor network (WSN) is to detect deviations in expected normal behavior and report it to the sink. In this paper, we propose TRACK — a no...
Avinash Srinivasan, Jie Wu
AHS
2007
IEEE
252views Hardware» more  AHS 2007»
13 years 11 months ago
A Hybrid Engine for the Placement of Domain-Specific Reconfigurable Arrays
Rapid-prototyping of commercial devices and the demanding requirements for flexible hardware in mobile applications have driven the raise of reconfigurable hardware. The adaptatio...
Wing On Fung, Tughrul Arslan, Sami Khawam