19 search results - page 4 / 4 » Circuits for wide-window superscalar processors |
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper describes a scalable, low-complexity alternative to the conventional load/store queue (LSQ) for superscalar processors that execute load and store instructions speculat...
ISLPED
2007
ACM
13 years 6 months ago
2007
ACM
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...