90 search results - page 1 / 18 » Clock distribution using multiple voltages |
TVLSI
2002
13 years 4 months ago
2002
: Clock networks account for a significant fraction of the power dissipation of a chip and are critical to performance. This paper presents theory and algorithms for building a low...
ISLPED
1999
ACM
13 years 9 months ago
1999
ACM
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...