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FPL
2004
Springer
101views Hardware» more  FPL 2004»
13 years 10 months ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz
IPPS
2006
IEEE
13 years 11 months ago
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
ICPADS
2005
IEEE
13 years 11 months ago
Exploiting Multi-level Parallelism for Homology Search using General Purpose Processors
New biological experimental techniques are continuing to generate large amounts of data using DNA, RNA, human genome and protein sequences. The quantity and quality of data from t...
Xiandong Meng, Vipin Chaudhary
IPPS
1997
IEEE
13 years 9 months ago
Optimizing Parallel Bitonic Sort
Sorting is an important component of many applications, and parallel sorting algorithms have been studied extensively in the last three decades. One of the earliest parallel sorti...
Mihai F. Ionescu
IPPS
2006
IEEE
13 years 11 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...