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ISSS
1998
IEEE
152views Hardware» more  ISSS 1998»
13 years 9 months ago
Code Generation for Compiled Bit-True Simulation of DSP Applications
Bit-true simulation veri es the nite word length choices in the VLSI implementation of a DSP application. Present-day bit-true simulation tools are time consuming. We elaborate a ...
Luc De Coster, Marleen Adé, Rudy Lauwereins...
VLSISP
2008
159views more  VLSISP 2008»
13 years 4 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...
ISCAS
1999
IEEE
132views Hardware» more  ISCAS 1999»
13 years 9 months ago
Dynamic trellis diagrams for optimized DSP code generation
In this paper, we present the application of dynamic trellis diagrams (DTDs) to automatic translation of data flow graphs (DFGs) into highly optimized programs for digital signal ...
Stefan Fröhlich, Martin Gotschlich, Udo Krebe...
RTCSA
2006
IEEE
13 years 11 months ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
LCTRTS
2010
Springer
13 years 6 months ago
An efficient code update scheme for DSP applications in mobile embedded systems
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
Weijia Li, Youtao Zhang