135 search results - page 2 / 27 » Code and Data Transformations for Improving Shared Cache Per... |
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
ISSS
1996
IEEE
13 years 9 months ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
MSE
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...