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MICRO
1991
IEEE
85views Hardware» more  MICRO 1991»
13 years 8 months ago
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, ...
ICDCS
1996
IEEE
13 years 8 months ago
Dynamic Scheduling Strategies for Shared-memory Multiprocessors
Efficiently scheduling parallel tasks on to the processors of a shared-memory multiprocessor is critical to achieving high performance. Given perfect information at compile-time, ...
Babak Hamidzadeh, David J. Lilja
ASPLOS
2012
ACM
12 years 6 days ago
Chameleon: operating system support for dynamic processors
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
Sankaralingam Panneerselvam, Michael M. Swift
HPCA
2001
IEEE
14 years 4 months ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas
ICPP
1993
IEEE
13 years 8 months ago
A Concurrent Dynamic Task Graph
Task graphs are used for scheduling tasks on parallel processors when the tasks have dependencies. If the execution of the program is known ahead of time, then the tasks can be st...
Theodore Johnson