Automatically Mapping Code on an Intelligent Memory Architecture

This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high performance with this type of architecture, code needs to be partitioned and scheduled such that each section is assigned to the processor on which it runs most efficiently. In addition, the two processors should overlap their execution as much as possible. With our algorithm, applications are mapped fully automatically using both static and dynamic information. Using a set of standard applications and a simulated architecture, we show aver

• Type: Conference
• Year: 2001
• Where: HPCA
• Authors: Jaejin Lee, Yan Solihin, Josep Torrellas
• Keywords: Computer Architecture, Generic Intelligent Memory, Host Processor, HPCA 2001, Simpler Memory Processor