10 search results - page 1 / 2 » Compiler-Directed Cache Line Size Adaptivity |
IMS
2000
13 years 8 months ago
2000
The performance of a computer system is highly dependent on the performance of the cache memory system. The traditional cache memory system has an organization with a line size tha...
ICS
1999
Tsinghua U.
13 years 9 months ago
1999
Tsinghua U.
A cache line size has a signi cant e ect on missrate and memorytra c. Today's computers use a xed line size, typically 32B, which may not be optimalfor a given application. O...
HIPC
1999
Springer
13 years 9 months ago
1999
Springer
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
CASES
2006
ACM
13 years 10 months ago
2006
ACM
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applica...