18 search results - page 2 / 4 » Compiler-assisted dynamic scheduling for effective paralleli... |
CCGRID
2008
IEEE
13 years 11 months ago
2008
IEEE
Understanding the potential and implications of asymmetric multi-core processors for cluster computing is necessary, as these processors are rapidly becoming mainstream components...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
ICPP
1996
IEEE
13 years 8 months ago
1996
IEEE
Tiling exploits temporal reuse carried by an outer loop of a loop nest to enhance cache locality. Loop skewing is typically required to make tiling legal. This restricts parallelis...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Distributed computing systems are a viable and less expensive alternative to parallel computers. However, concurrent programming methods in distributed systems have not been studi...
IJPP
2011
12 years 11 months ago
2011
With the advent of multi-core processors, desktop application developers must finally face parallel computing and its challenges. A large portion of the computational load in a p...