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PRDC
2006
IEEE
13 years 11 months ago
SEVA: A Soft-Error- and Variation-Aware Cache Architecture
As SRAM devices are scaled down, the number of variation-induced defective memory cells increases rapidly. Combination of ECC, particularly SECDED, with a redundancy technique can...
Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
14 years 2 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
13 years 10 months ago
IVF: Characterizing the vulnerability of microprocessor structures to intermittent faults
—With the advancement of CMOS manufacturing process to nano-scale, future shipped microprocessors will be increasingly vulnerable to intermittent faults. Quantitatively character...
Songjun Pan, Yu Hu, Xiaowei Li
CGO
2009
IEEE
14 years 4 days ago
ESoftCheck: Removal of Non-vital Checks for Fault Tolerance
—As semiconductor technology scales into the deep submicron regime the occurrence of transient or soft errors will increase. This will require new approaches to error detection. ...
Jing Yu, María Jesús Garzarán...
ICDCS
2005
IEEE
13 years 11 months ago
Resilient Localization for Sensor Networks in Outdoor Environments
The process of computing the physical locations of nodes in a wireless sensor network is known as localization. Selflocalization is critical for large-scale sensor networks becaus...
YoungMin Kwon, Kirill Mechitov, Sameer Sundresh, W...