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» Compiling Ruby into FPGAs
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TVLSI
2008
115views more  TVLSI 2008»
13 years 5 months ago
Outer Loop Pipelining for Application Specific Datapaths in FPGAs
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
ICDE
2011
IEEE
270views Database» more  ICDE 2011»
12 years 9 months ago
Real-time pattern matching with FPGAs
— We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our sol...
Louis Woods, Jens Teubner, Gustavo Alonso
FCCM
2009
IEEE
189views VLSI» more  FCCM 2009»
14 years 16 days ago
Application Specific Customization and Scalability of Soft Multiprocessors
Although soft microprocessors are widely used in FPGAs, limited work has been performed regarding how to automatically and efficiently generate soft multiprocessors. In this paper...
Deepak Unnikrishnan, Jia Zhao, Russell Tessier
VEE
2012
ACM
255views Virtualization» more  VEE 2012»
12 years 1 months ago
Adding dynamically-typed language support to a statically-typed language compiler: performance evaluation, analysis, and tradeof
Applications written in dynamically typed scripting languages are increasingly popular for Web software development. Even on the server side, programmers are using dynamically typ...
Kazuaki Ishizaki, Takeshi Ogasawara, José G...
TACO
2008
130views more  TACO 2008»
13 years 5 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt