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» Compiling for SIMD Within a Register
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ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
14 years 2 months ago
Compiler-Based Register Name Adjustment for Low-Power Embedded Processors
We preseM an algorithm for compiler-driven regisrer mme adjustment with rhe main goal of power minimization on instruction fetch und mgisterjile access. In mosr instruction set ar...
Peter Petrov, Alex Orailoglu
PLDI
1998
ACM
13 years 9 months ago
Quality and Speed in Linear-scan Register Allocation
A linear-scan algorithm directs the global allocation of register candidates to registers based on a simple linear sweep over the program being compiled. This approach to register...
Omri Traub, Glenn H. Holloway, Michael D. Smith
CEC
2009
IEEE
13 years 9 months ago
JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator
This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous...
Olivier Brousse, Jérémie Guillot, Th...
MICRO
1998
IEEE
111views Hardware» more  MICRO 1998»
13 years 9 months ago
Precise Register Allocation for Irregular Architectures
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
Timothy Kong, Kent D. Wilken
ASAP
2007
IEEE
219views Hardware» more  ASAP 2007»
13 years 11 months ago
SIMD Vectorization of Histogram Functions
Existing SIMD extensions cannot efficiently vectorize the histogram function due to memory collisions. We propose two techniques to avoid this problem. In the first, a hierarchi...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...