24 search results - page 1 / 5 » Compositional, dynamic cache management for embedded chip mu... |
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
HIPEAC
2009
Springer
13 years 8 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
JEC
2006
13 years 4 months ago
2006
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...