1474 search results - page 2 / 295 » Computing in Memory Architectures for Digital Image Processi... |
DATE
2009
IEEE
14 years 11 days ago
2009
IEEE
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
ICPPW
2003
IEEE
13 years 11 months ago
2003
IEEE
In this paper a simple but effective approach for parallelization of cellular neural networks for image processing is developed. Digital gray-scale images were used to evaluate th...
DELOS
2000
13 years 7 months ago
2000
: This paper presents an overview over parallel architectures for the efficient realisation of digital libraries by considering image databases as an example. The state of the art ...
CAMP
2005
IEEE
13 years 11 months ago
2005
IEEE
— In this paper, a programmable analog retina is presented and compared with state of the art MPU for embedded imaging applications. The comparison is based on the energy require...
ICCD
1992
IEEE
13 years 9 months ago
1992
IEEE
This paper presents a data- ow computer, constituted of a large array of data- ow processors and programmed using a functional language, and its application to realtime image proc...