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ERLANG
2006
ACM
13 years 10 months ago
Concurrent caching
A concurrent cache design is presented which allows cached data to be spread across a cluster of computers. The implementation s persistent storage from cache storage and abstract...
Jay Nelson
IPPS
2006
IEEE
13 years 10 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
USENIX
1996
13 years 6 months ago
A Hierarchical Internet Object Cache
: This paper discussesthedesignandperformance of a hierarchical proxy-cache designed to make Internet information systems scale better. The design was motivated by our earlier trac...
Anawat Chankhunthod, Peter B. Danzig, Chuck Neerda...
SC
2004
ACM
13 years 10 months ago
Optimal File-Bundle Caching Algorithms for Data-Grids
The file-bundle caching problem arises frequently in scientific applications where jobs process several files concurrently. Consider a host system in a data-grid that maintains...
Ekow J. Otoo, Doron Rotem, Alexandru Romosan
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
12 years 8 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...