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DAC
2010
ACM
13 years 5 months ago
A correlation-based design space exploration methodology for multi-processor systems-on-chip
Given the increasing complexity of multi-processor systems-onchip, a wide range of parameters must be tuned to find the best trade-offs in terms of the selected system figures of ...
Giovanni Mariani, Aleksandar Brankovic, Gianluca P...
CASES
2008
ACM
13 years 7 months ago
Compiling custom instructions onto expression-grained reconfigurable architectures
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi
CODES
2009
IEEE
13 years 10 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
ICDE
2009
IEEE
171views Database» more  ICDE 2009»
14 years 2 days ago
CoTS: A Scalable Framework for Parallelizing Frequency Counting over Data Streams
Applications involving analysis of data streams have gained significant popularity and importance. Frequency counting, frequent elements and top-k queries form a class of operato...
Sudipto Das, Shyam Antony, Divyakant Agrawal, Amr ...
DAC
2008
ACM
14 years 6 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...