136 search results - page 2 / 28 » Congestion reduction in traditional and new routing architec... |
DFG
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. We give an overview of important results for non-atomic congestion games in their traditional form along with self-contained and short proofs and then present new results...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
ICCAD
2000
IEEE
13 years 9 months ago
2000
IEEE
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Global Routing has been a traditional EDA problem. It has congestion elimination as the first and foremost priority. Despite of the recent development for popular rip-up and rerout...