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FPGA
2005
ACM
137views FPGA» more  FPGA 2005»
13 years 11 months ago
HARP: hard-wired routing pattern FPGAs
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
ASPDAC
2008
ACM
124views Hardware» more  ASPDAC 2008»
13 years 7 months ago
MaizeRouter: Engineering an effective global router
In this paper, we present the complete design and architectural details of MAIZEROUTER. MAIZEROUTER reflects a significant leap in progress over existing publicly available routing...
Michael D. Moffitt
SIGCOMM
2005
ACM
13 years 11 months ago
Declarative routing: extensible routing with declarative queries
The Internet’s core routing infrastructure, while arguably robust and efficient, has proven to be difficult to evolve to accommodate the needs of new applications. Prior researc...
Boon Thau Loo, Joseph M. Hellerstein, Ion Stoica, ...
DAC
2006
ACM
14 years 6 months ago
BoxRouter: a new global router based on box expansion and progressive ILP
In this paper, we propose a new global router, BoxRouter, powered by the concept of box expansion and progressive integer linear programming (ILP). BoxRouter first uses a simple P...
Minsik Cho, David Z. Pan
DAC
2008
ACM
14 years 6 months ago
An integrated nonlinear placement framework with congestion and porosity aware buffer planning
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
Tung-Chieh Chen, Ashutosh Chakraborty, David Z. Pa...