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» Constraint Analysis for DSP Code Generation
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ISSS
1997
IEEE
77views Hardware» more  ISSS 1997»
13 years 8 months ago
Constraint Analysis for DSP Code Generation
Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, ...
VLSISP
2008
159views more  VLSISP 2008»
13 years 5 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...
ISSS
1995
IEEE
96views Hardware» more  ISSS 1995»
13 years 8 months ago
Time-constrained code compaction for DSPs
{DSP algorithms in most cases are subject to hard real-time constraints. In case of programmable DSP processors, meeting those constraints must be ensured by appropriate code gener...
Rainer Leupers, Peter Marwedel
SCOPES
2004
Springer
13 years 10 months ago
DSP Code Generation with Optimized Data Word-Length Selection
Digital signal processing applications are implemented in embedded systems with fixed-point arithmetic to minimize the cost and the power consumption. To reduce the application ti...
Daniel Menard, Olivier Sentieys
DAC
1995
ACM
13 years 8 months ago
Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores
Application domain specific DSP cores are becoming increasingly popular due to their advantageous trade–off between flexibility and cost. However, existing code generation metho...
Adwin H. Timmer, Marino T. J. Strik, Jef L. van Me...