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» Context Sensitivity in Logical Modeling with Time Delays
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ISOLA
2010
Springer
13 years 3 months ago
Context-Sensitivity in IPET for Measurement-Based Timing Analysis
Abstract. The Implicit Path Enumeration Technique (IPET) has become widely accepted as a powerful technique to compute upper bounds on the Worst-Case Execution Time (WCET) of time-...
Michael Zolda, Sven Bünte, Raimund Kirner
GLVLSI
2000
IEEE
110views VLSI» more  GLVLSI 2000»
13 years 9 months ago
A sensitivity based placer for standard cells
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
DATE
2005
IEEE
144views Hardware» more  DATE 2005»
13 years 11 months ago
Context Sensitive Performance Analysis of Automotive Applications
Accurate timing analysis is key to efficient embedded system synthesis and integration. While industrial control software systems are developed using graphical models, such as Ma...
Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabia...
ICCAD
1997
IEEE
122views Hardware» more  ICCAD 1997»
13 years 9 months ago
Approximate timing analysis of combinational circuits under the XBD0 model
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, R...
DAC
1995
ACM
13 years 9 months ago
Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits
Abstract We observe that the switching activity at a circuit node, also called the transition density, can be extremely sensitive to the circuit internal delays. As a result, sligh...
Farid N. Najm, Michael Y. Zhang