212 search results - page 4 / 43 » Converting a C |
ISCAS
2008
IEEE
14 years 10 days ago
2008
IEEE
—This paper proposes a digital constant on-time control method for high switching frequency DC-DC buck converter, which eliminates the need for high resolution digital pulse-widt...
ISCAS
2007
IEEE
14 years 7 days ago
2007
IEEE
— Mismatches between sample-and-hold (S/H) circuits in a time-interleaved analog-to-digital data converter (ADC) cause undesirable distortions in the output spectrum. To reduce t...
ISCAS
1995
IEEE
13 years 9 months ago
1995
IEEE
Abstract— This paper describes a new first and secondorder delta-sigma modulator (DSM) concept where the first integrator is extracted and implemented by a FM oscillator with t...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
—State-of-art implementations of pipelined ADCs can only realize a multiplying DAC (MDAC) with (2n –1) levels. However, the number of levels needed to optimize the performance ...
ICASSP
2010
IEEE
13 years 6 months ago
2010
IEEE
Sub-Nyquist systems capture the signal information in a different fashion than uniform high-rate samples. Consequently, digital processing, which is the prime reason for leaving t...