3 search results - page 1 / 1 » Cooperative Instruction Scheduling with Linear Scan Register... |
HIPC
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. Linear scan register allocation is an attractive register allocation algorithm because of its simplicity and fast running time. However, it is generally felt that linear ...
GLVLSI
2007
IEEE
13 years 8 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
LCTRTS
2001
Springer
13 years 9 months ago
2001
Springer
Phase-decoupled methods for code generation are the state of the art in compilers for standard processors but generally produce code of poor quality for irregular target architect...