16 search results - page 3 / 4 » Coordinated power management of voltage islands in CMPs |
CODES
2001
IEEE
13 years 9 months ago
2001
IEEE
In this paper, we explore a hybrid global/local search optimization framework for dynamic voltage scaling in embedded multiprocessor systems. The problem is to find, for a multipr...
HPCA
2012
IEEE
12 years 1 months ago
2012
IEEE
Lowering supply voltage is one of the most effective techniques for reducing microprocessor power consumption. Unfortunately, at low voltages, chips are very sensitive to process ...
VEE
2012
ACM
12 years 1 months ago
2012
ACM
With the shift to many-core chip multiprocessors (CMPs), a critical issue is how to effectively coordinate and manage the execution of applications and hardware resources to overc...
MICRO
2009
IEEE
14 years 12 days ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
ISCA
2007
IEEE
14 years 2 days ago
2007
IEEE
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...