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EDCC
2006
Springer
13 years 9 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...
MICRO
2007
IEEE
188views Hardware» more  MICRO 2007»
13 years 12 months ago
Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...
DAC
2008
ACM
13 years 7 months ago
Protecting bus-based hardware IP by secret sharing
Our work addresses protection of hardware IP at the mask level with the goal of preventing unauthorized manufacturing. The proposed protocol based on chip locking and activation i...
Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov
DAC
2004
ACM
14 years 6 months ago
A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
Chong Zhao, Xiaoliang Bai, Sujit Dey
IOLTS
2005
IEEE
163views Hardware» more  IOLTS 2005»
13 years 11 months ago
Modeling Soft-Error Susceptibility for IP Blocks
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
Robert C. Aitken, Betina Hold