43 search results - page 8 / 9 » Cycle count accurate memory modeling in system level design |
LCTRTS
2010
Springer
14 years 3 days ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
SIGMETRICS
2003
ACM
13 years 10 months ago
2003
ACM
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
EH
2004
IEEE
13 years 9 months ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
TPDS
2002
13 years 4 months ago
2002
One of the most fundamental problems automatic parallelization tools are confronted with is to find an optimal domain decomposition for a given application. For regular domain prob...