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VTS
2000
IEEE
95views Hardware» more  VTS 2000»
13 years 9 months ago
DEFUSE: A Deterministic Functional Self-Test Methodology for Processors
1 At-speed testing is becoming increasingly difficult with external testers as the speed of microprocessors approaches the GHz range. One solution to this problem is built-in self-...
Li Chen, Sujit Dey
DATE
2002
IEEE
117views Hardware» more  DATE 2002»
13 years 9 months ago
Effective Software Self-Test Methodology for Processor Cores
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...
ITC
1998
IEEE
95views Hardware» more  ITC 1998»
13 years 9 months ago
Native mode functional test generation for processors with applications to self test and design validation
New methodologies based on functional testing and built-in self-test can narrow the gap between necessary solutions and existing techniques for processor validation and testing. W...
Jian Shen, Jacob A. Abraham
HPCA
2003
IEEE
14 years 5 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
DAC
1997
ACM
13 years 8 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant