103 search results - page 21 / 21 » DPA Leakage Models for CMOS Logic Circuits |
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
ISLPED
2006
ACM
13 years 11 months ago
2006
ACM
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
GLVLSI
2007
IEEE
13 years 7 months ago
2007
IEEE
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...