10 search results - page 1 / 2 » DRIM: a low power dynamically reconfigurable instruction mem... |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
CSREAESA
2003
13 years 6 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
ARCS
2004
Springer
13 years 8 months ago
2004
Springer
: This paper reports ongoing work towards a dynamically reconfigurable System-on-Chip (SoC) platform for video signal processing. It consists of dedicated, statically and dynamical...
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...