Sciweavers

39 search results - page 1 / 8
» DSP Code Generation with Optimized Data Word-Length Selectio...
Sort
View
SCOPES
2004
Springer
13 years 10 months ago
DSP Code Generation with Optimized Data Word-Length Selection
Digital signal processing applications are implemented in embedded systems with fixed-point arithmetic to minimize the cost and the power consumption. To reduce the application ti...
Daniel Menard, Olivier Sentieys
ISSS
1997
IEEE
102views Hardware» more  ISSS 1997»
13 years 9 months ago
An Efficient Model for DSP Code Generation: Performance, Code Size, Estimated Energy
This paper presents a model for simultaneous instruction selection, compaction, and register allocation. An arc mapping model along with logical propositions is used to create an ...
Catherine H. Gebotys
DAC
1995
ACM
13 years 8 months ago
Code Optimization Techniques for Embedded DSP Microprocessors
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
TCAD
1998
159views more  TCAD 1998»
13 years 4 months ago
Code density optimization for embedded DSP processors using data compression techniques
We address the problem of code size minimization in VLSI systems with embedded DSP processors. Reducing code size reduces the production cost of embedded systems. We use data comp...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer
ISCAS
1999
IEEE
132views Hardware» more  ISCAS 1999»
13 years 9 months ago
Dynamic trellis diagrams for optimized DSP code generation
In this paper, we present the application of dynamic trellis diagrams (DTDs) to automatic translation of data flow graphs (DFGs) into highly optimized programs for digital signal ...
Stefan Fröhlich, Martin Gotschlich, Udo Krebe...