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DATE
2004
IEEE
146views Hardware» more  DATE 2004»
13 years 8 months ago
Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nik...
DAC
2006
ACM
14 years 5 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 1 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
CODES
2006
IEEE
13 years 11 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt
ISLPED
1997
ACM
95views Hardware» more  ISLPED 1997»
13 years 9 months ago
Formalized methodology for data reuse exploration in hierarchical memory mappings
Efficient use of an optimized memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption in data ...
Jean-Philippe Diguet, Sven Wuytack, Francky Cattho...