10 search results - page 1 / 2 » Data assignment and access scheduling exploration for multi-... |
ESTIMEDIA
2004
Springer
13 years 10 months ago
2004
Springer
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
ICASSP
2008
IEEE
13 years 11 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...