59 search results - page 3 / 12 » Data parallel FPGA workloads: Software versus hardware |
SASP
2009
IEEE
14 years 1 months ago
2009
IEEE
—This paper presents a parallelized architecture for hardware acceleration of multi-view face detection. In our architecture, the multi-view face detection system generates rotat...
IPPS
2007
IEEE
14 years 18 days ago
2007
IEEE
Linear Feedback Shift Registers (LFSRs) have always received considerable attention in computer science especially in coding theory and in cryptography. The scope of applications ...
MICRO
2006
IEEE
13 years 6 months ago
2006
IEEE
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
FCCM
2006
IEEE
14 years 11 days ago
2006
IEEE
In this paper, we present hthreads, a unifying programming model for specifying application threads running within a hybrid CPU/FPGA system. Threads are specified from a single p...
IPPS
2006
IEEE
14 years 10 days ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...