8 search results - page 1 / 2 » Data path Configuration Time Reduction for Run-time Reconfig... |
ERSA
2009
13 years 2 months ago
2009
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit changing needs of a computation during run time. The increasing...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
A secure content distribution system is prototyped based on run-time partial reconfigurability of an FPGA. The system provides a robust content protection scheme for online conten...
FCCM
1998
IEEE
13 years 9 months ago
1998
IEEE
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
DAGSTUHL
2006
13 years 6 months ago
2006
Dynamic and partial reconfiguration discovers more and more the focus in academic and industrial research. Modern systems in e.g. avionic and automotive applications exploit the p...