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» Dataflow Architectures for GALS

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TVLSI
2010

223views Artificial Intelligence» more TVLSI 2010»

A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors

13 years 6 days ago

Download www.ece.ucdavis.edu

A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...

Zhiyi Yu, Bevan M. Baas

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CSUR
2004

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Advances in dataflow programming languages

13 years 5 months ago

Download www.cs.wayne.edu

Many developments have taken place within dataflow programming languages in the past decade. In particular, there has been a great deal of activity and advancement in the field of ...

Wesley M. Johnston, J. R. Paul Hanna, Richard J. M...

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ISLPED
2006
ACM

76views Hardware» more ISLPED 2006»

Synergistic temperature and energy management in GALS processor architectures

13 years 11 months ago

Download www.csl.cornell.edu

We propose a synergistic temperature and energy management scheme for GALS processors. Localized DVS is applied in domains that contain hotspots, permitting other critical domains...

YongKang Zhu, David H. Albonesi

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ICCAD
2006
IEEE

114views Hardware» more ICCAD 2006»

Studying a GALS FPGA architecture using a parameterized automatic design flow

14 years 2 months ago

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Xin Jia, Ranga Vemuri

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