10 search results - page 1 / 2 » Decomposition of Extended Finite State Machine for Low Power... |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
DAC
1998
ACM
13 years 9 months ago
1998
ACM
ASPDAC
2000
ACM
13 years 9 months ago
2000
ACM
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
FECS
2010
13 years 3 months ago
2010
: This paper presents an experimental module for teaching finite state machine concepts. This module is designed for use in a lecture-based course that does not currently have a la...