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JPDC
2007
96views more  JPDC 2007»
13 years 5 months ago
Optimal pipeline decomposition and adaptive network mapping to support distributed remote visualization
This paper discusses algorithmic and implementation aspects of a distributed remote visualization system that optimally decomposes and adaptively maps the visualization pipeline t...
Mengxia Zhu, Qishi Wu, Nageswara S. V. Rao, S. Sit...
ICCAD
2008
IEEE
177views Hardware» more  ICCAD 2008»
14 years 2 months ago
Double patterning technology friendly detailed routing
— Double patterning technology (DPT) is a most likely lithography solution for 32/22nm technology nodes as of 2008 due to the delay of Extreme Ultra Violet lithography. However, ...
Minsik Cho, Yongchan Ban, David Z. Pan
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
13 years 8 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat
FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
13 years 10 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
13 years 11 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier