86 search results - page 4 / 18 » Delay-Reduced Combinational Logic Synthesis using Multiplexe... |
LOPSTR
1998
Springer
14 years 1 months ago
1998
Springer
Based on a variable-free combinatory form of definite clause logic programs we outline a methodology and supporting program environment CombInduce for inducing well-moded logic pro...
VLSID
1997
IEEE
14 years 1 months ago
1997
IEEE
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
This paper uses under-approximation of unreachable states of a design to derive incomplete specification of combinational logic. The resulting incompletely-specified functions are...
ICCAD
1991
IEEE
14 years 28 days ago
1991
IEEE
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
OOPSLA
2010
Springer
13 years 7 months ago
2010
Springer
Given a high-level specification and a low-level programming language, our goal is to automatically synthesize an efficient program that meets the specification. In this paper,...