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» Design Methods for Multiple-Valued Input Address Generators
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DAC
1997
ACM
13 years 9 months ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
NLE
2007
148views more  NLE 2007»
13 years 4 months ago
Abbreviated text input using language modeling
We address the problem of improving the efficiency of natural language text input under degraded conditions (for instance, on mobile computing devices or by disabled users), by ta...
Stuart M. Shieber, Rani Nelken
SIGCOMM
2010
ACM
13 years 5 months ago
Generic and automatic address configuration for data center networks
Data center networks encode locality and topology information into their server and switch addresses for performance and routing purposes. For this reason, the traditional address...
Kai Chen, Chuanxiong Guo, Haitao Wu, Jing Yuan, Zh...
KDD
2010
ACM
300views Data Mining» more  KDD 2010»
13 years 3 months ago
Using data mining techniques to address critical information exchange needs in disaster affected public-private networks
Crisis Management and Disaster Recovery have gained immense importance in the wake of recent man and nature inflicted calamities. A critical problem in a crisis situation is how t...
Li Zheng, Chao Shen, Liang Tang, Tao Li, Steven Lu...
ICASSP
2008
IEEE
13 years 11 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...