153 search results - page 2 / 31 » Design Space Exploration in System Level Synthesis under Mem... |
DSD
2010
IEEE
13 years 3 months ago
2010
IEEE
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
CORR
2006
Springer
13 years 4 months ago
2006
Springer
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
ICCAD
1994
IEEE
13 years 9 months ago
1994
IEEE
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
EMSOFT
2003
Springer
13 years 10 months ago
2003
Springer
An important bottleneck in model-based design of embedded systems is the cost of constructing models. This cost can be significantly decreased by increasing the reuse of existing m...
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...