312 search results - page 2 / 63 » Design Space of Heterogeneous Synchronization |
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
CODES
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper considers the problem of designing heterogeneous multiprocessor embedded systems. The focus is on a step of the design flow: the definition of innovative metrics for th...
ASAP
2005
IEEE
13 years 11 months ago
2005
IEEE
The task of automatic design space exploration of heterogeneous multi-processor systems is often tackled with Evolutionary Algorithms. In this paper, we propose a novel approach i...
DATE
2008
IEEE
14 years 2 days ago
2008
IEEE
When designing heterogeneous MP-SoCs designers have to take into account various objectives such as power, die size, flexibility, performance or programmability. But to be able t...
DATE
2009
IEEE
14 years 11 days ago
2009
IEEE
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...