17 search results - page 4 / 4 » Design and CAD challenges in 45nm CMOS and beyond |
ISQED
2010
IEEE
13 years 3 months ago
2010
IEEE
Reduced device dimensions and operating voltages that accompany technology scaling have led to increased design challenges with each successive technology node. Large scale 6T SRA...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...