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ISCAS
2005
IEEE
143views Hardware» more  ISCAS 2005»
13 years 10 months ago
Design and FPGA implementation of a structure of evolutionary digital filters for hardware implementation
— In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by ad...
Masahide Abe, Hiroki Arai, Masayuki Kawamata
ISCAS
2003
IEEE
86views Hardware» more  ISCAS 2003»
13 years 10 months ago
Hardware implementation of evolutionary digital filters
Masahide Abe, Masayuki Kawamata
FCCM
2005
IEEE
124views VLSI» more  FCCM 2005»
13 years 10 months ago
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
Arash Hariri, Reza Rastegar, Morteza Saheb Zamani,...
EH
2003
IEEE
138views Hardware» more  EH 2003»
13 years 10 months ago
Implementing Evolution of FIR-Filters Efficiently in an FPGA
Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for Evolvable hardware (EHW) ...
Knut Arne Vinger, Jim Torresen
ISCAS
2002
IEEE
141views Hardware» more  ISCAS 2002»
13 years 9 months ago
Power characterization of digital filters implemented on FPGA
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nann...