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» Design and Implementation of the TRIPS Primary Memory System
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ICCD
2006
IEEE
107views Hardware» more  ICCD 2006»
14 years 1 months ago
Design and Implementation of the TRIPS Primary Memory System
Abstract— In this paper, we describe the design and implementation of the primary memory system of the TRIPS processor. To match the aggressive execution bandwidth and support hi...
Simha Sethumadhavan, Robert G. McDonald, Rajagopal...
NOCS
2007
IEEE
13 years 11 months ago
Implementation and Evaluation of a Dynamically Routed Processor Operand Network
— Microarchitecturally integrated on-chip networks, or micronets, are candidates to replace busses for processor component interconnect in future processor designs. For micronets...
Paul Gratz, Karthikeyan Sankaralingam, Heather Han...
MICRO
2006
IEEE
105views Hardware» more  MICRO 2006»
13 years 11 months ago
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
Karthikeyan Sankaralingam, Ramadass Nagarajan, Rob...
CODES
2008
IEEE
13 years 6 months ago
Application specific non-volatile primary memory for embedded systems
Memory subsystems have been considered as one of the most critical components in embedded systems and furthermore, displaying increasing complexity as application requirements div...
Kwangyoon Lee, Alex Orailoglu
PERCOM
2006
ACM
14 years 4 months ago
A Reusable, Extensible Infrastructure for Augmented Field Trips
This paper describes a reusable pervasive information infrastructure developed as part of the Equator IRC, designed to allow the construction of literacy based eLearning activitie...
Mark J. Weal, Don Cruickshank, Danius T. Michaelid...