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DAC
1999
ACM
14 years 6 months ago
Hypergraph Partitioning with Fixed Vertices
We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partit...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
13 years 9 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
WSC
2004
13 years 7 months ago
Parallel Discrete Event Simulation of Space Shuttle Operations
This paper describes the application of parallel simulation techniques to represent structured functional parallelism present within the Space Shuttle Operations Flow, utilizing t...
José A. Sepúlveda, Luis C. Rabelo, M...
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 6 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
INFOCOM
2006
IEEE
13 years 11 months ago
GMPLS-Based Dynamic Provisioning and Traffic Engineering of High-Capacity Ethernet Circuits in Hybrid Optical/Packet Networks
- Rapid progress in deployment of national and regional optical network infrastructures holds the promise to provide abundant, inexpensive bandwidth to scientific communities. The ...
Xi Yang, Chris Tracy, Jerry Sobieski, Tom Lehman